Create Topology Template

In a High Speed environment, the Create Topology Template dialog allows you to create a topology template that is based on a predefined one that is supplied in eCADSTAR. You can specify the number of inputs and define its name in this dialog. The topology templates that you create can be assigned to the E-Nets in the design using the Assign Topology Template dialog. They are not available in other designs. Launch the Create Topology Template dialog by clicking in the Topology Template Manager dialog, Topology template section. Alternatively, click Create Template in the Assign Topology Template dialog.

Warning
If you modify a topology template that is already assigned to E-Nets or differential pairs, then any local pin pair constraint values that are set on them may be changed, without warning, when the topology is reapplied. The following recommendations are provided.
  • Add any constraints for E-Nets or differential pairs to the relevant topology template, rather than doing this locally in Constraint Browser.
  • When modifying a topology, make a copy of it first. This can then be applied to the relevant nets. This allows you to identify any changes to pin pair constraint information. These changes could be reversed, if necessary, by using the original topology template.

 

Note
When you assign a topology template, it is checked automatically in Constraint Browser. If the topological structure of the relevant signal does not follow the assigned topology template, then the assigned value is shown in red in the Topology Template column.

 

Value Description
Predefined topology template list Displays the predefined topology templates that are supplied in eCADSTAR. You can specify the number of inputs and define its name in this dialog. Click a value to view the topology template in the Preview box. You can also specify the number of inputs associated with the selected topology template, and define its name. The following table provides a description of each one. The Extensible for More Receivers? column indicates whether a topology template is point-to-point, or can be extended for the relevant signal.
Note
The topology templates that are listed may not be topologically compatible with the E-Nets in the Assign Topology Template dialog.
Topology templateTopology GroupDescriptionSingle-Ended or Differential?Extensible for More Receivers?
<New Single Ended Topology>GenericA simple single-ended topology template.Single-EndedYes
<New Differential Pair Topology>GenericA differential pair topology template.DifferentialYes
Branched_NearEndSeriesTermGenericA branched topology template, with a single, near-end, series termination.Single-EndedYes
DDR3_4_ADDR_CMD_CTRLSDRAM (Synchronous Dynamic RAM)For DDR3 or DDR4, this topology template applies to command and control signals, where the write-levelling feature of these types of SDRAM is used. The SDRAMs must also be placed and routed sequentially in a Fly-by topology, as defined by JEDEC. The accompanying differential clock topology template is DDR3_4_CK.Single-EndedYes
DDR3_4_CKSDRAM (Synchronous Dynamic RAM)For DDR3 or DDR4, this topology template applies to the differential clock signal associated with command and control signals, where the write-levelling feature of these types of SDRAM is used. The SDRAMs must also be placed and routed sequentially in a Fly-by topology, as defined by JEDEC. The accompanying topology template for the command and control signal is DDR3_4_ADDR_CMD_CTRL.DifferentialYes
DDR3_4_DQSDRAM (Synchronous Dynamic RAM)For DDR3 and DDR4, this topology template applies to DQ signals that are bidirectional and point-to-point. The topology template for the accompanying differential strobe signal is DDR3_4_DQS.Single-EndedNo
DDR3_4_DQSSDRAM (Synchronous Dynamic RAM)For DDR3 and DDR4, this topology template applies to differential strobe topology (DQS) signals that are bidirectional and point-to-point. The topology template for the accompanying DQ signal is DDR3_4_DQ.DifferentialNo
DDaisy_FarEndDMTermGenericA differential, daisy chain topology template. A differential termination is located at the far-end.DifferentialYes
DDaisy_FarEndOMTermGenericA differential, daisy chain topology template. An odd-mode termination is located at the far-end.DifferentialYes
DHSTL_Class_II_FlybyHSTL (High-Speed Transceiver Logic)A Class II, High-Speed Transceiver Logic template for differential signals, in a Fly-by topology. You can adjust these topology templates for signals that have a larger numbers of receivers. Standards for HSTL, including EIA/JESD8-6, are defined by JEDEC. Check that the topology template is suitable for your requirements. The prefix “D” denotes that the signal is differential.DifferentialYes
DHSTL_Class_I_FlybyHSTL (High-Speed Transceiver Logic)A Class I, High-Speed Transceiver Logic template for differential signals, in a Fly-by topology. You can adjust these topology templates for signals that have a larger numbers of receivers. Standards for HSTL, including EIA/JESD8-6, are defined by JEDEC. Check that the topology template is suitable for your requirements. The prefix “D” denotes that the signal is differential.DifferentialYes
DSSTL_Class_II_FlybySSTL(Stub Series-Terminated Logic)A Class II, Stub Series Terminated Logic template for differential signals, in a Fly-by topology. You can adjust this topology template for signals that have a larger numbers of receivers. Check that it is suitable for your requirements: for example, 1.8V SSTL is used in some SDRAM interfaces, and is defined by EIA/JESD8-15A. SSTL standards are defined by JEDEC. The prefix “D” denotes that the signal is differential.DifferentialYes
DSSTL_Class_I_FlybySSTL(Stub Series-Terminated Logic)A Class I, Stub Series Terminated Logic template for differential signals, in a Fly-by topology. You can adjust this topology template for signals that have a larger numbers of receivers. Check that it is suitable for your requirements: for example, 1.8V SSTL is used in some SDRAM interfaces, and is defined by EIA/JESD8-15A. SSTL standards are defined by JEDEC. The prefix “D” denotes that the signal is differential.DifferentialYes
DTBranchGenericA differential T-Branch topology template (Balanced H-Tree).DifferentialYes
Daisy_FarEndTermGenericA single-ended, daisy chain, topology template that has far-end termination.Single-EndedYes
Diff_Series_CapsGenericA differential, point-to-point, topology template that has AC coupling capacitors.DifferentialNo
Diff_SimpleGenericA differential, point-to-point, topology template.DifferentialNo
HSTL_Class_II_FlybyHSTL (High-Speed Transceiver Logic)A Class II, High-Speed Transceiver Logic template for single-ended signals, in a Fly-by topology. You can adjust these topology templates for signals that have a larger numbers of receivers. Standards for HSTL, including EIA/JESD8-6, are defined by JEDEC. Check that the topology template is suitable for your requirements.Single-EndedYes
HSTL_Class_I_FlybyHSTL (High-Speed Transceiver Logic)A Class I, High-Speed Transceiver Logic template for single-ended signals, in a Fly-by topology. You can adjust these topology templates for signals that have a larger numbers of receivers. Standards for HSTL, including EIA/JESD8-6, are defined by JEDEC. Check that the topology template is suitable for your requirements.Single-EndedYes
SSTL_Class_II_FlybySSTL (Stub Series-Terminated Logic)A Class II, Stub Series Terminated Logic template for single-ended signals, in a Fly-by topology.  You can adjust this topology template for signals that have a larger numbers of receivers. Check that it is suitable for your requirements: for example, 1.8V SSTL is used in some SDRAM interfaces, and is defined by EIA/JESD8-15A. SSTL standards are defined by JEDEC.Single-EndedYes
SSTL_Class_I_FlybySSTL (Stub Series-Terminated Logic)A Class I, Stub Series Terminated Logic template for single-ended signals, in a Fly-by topology. You can adjust this topology template for signals that have a larger numbers of receivers. Check that it is suitable for your requirements: for example, 1.8V SSTL is used in some SDRAM interfaces, and is defined by EIA/JESD8-15A. SSTL standards are defined by JEDEC.Single-EndedYes
TBranchGenericA single-ended, T-Branch, topology template (Balanced H-Tree).Single-EndedYes
Number of inputs The number of receivers in the topology template, not including the driver. If you launch this dialog from the Assign Topology Template dialog, then this value is automatically set to the number of receivers of the selected E-Net. The image of the selected topology template is immediately updated in the Preview box to display the specified number of receivers.
  • For all topology templates except Branched_NearEndSeriesTerm, DTBranch and TBranch: specify a value between 1 and 32.
  • For the Branched_NearEndSeriesTerm, DTBranch and TBranch topology templates: specify a value between 2 and 32.

If you select the displayed value, then you can change it using the middle button on the mouse.

Name Allows you to specify a unique name of the topology template that you create, based on the predefined one that you select. Spaces are not permitted in the name. By default the name "NewTopoTemplate-[n]" is used.
Preview Displays an image of the topology template that you select in the Predefined topology template list. The image is immediately updated to display the number of receivers that specify in the Number of inputs box. You cannot edit this image. To delete tiles in the topology template, select it in the Tile Editor, in the Topology Template Manager, and press Delete on the keyboard.
OK Saves the topology template that you create, based on the predefined one that you select. The topology template is saved with the specified name and number of receivers. This dialog is closed, and the new topology template is displayed in the Topology Template Manager dialog, Topology template table.
Cancel Closes this dialog without creating a new topology template. The Topology Template Manager remains open.

 

Note
Other areas of eCADSTAR are not accessible when the Create Topology Template dialog is displayed.